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Lamport Clocks

Stephen M. Reaves

::

2024-02-27

Notes about Lecture 5b for CS-6210

Summary

Lamport’s Logical Clock

Each node knows:

Lamport’s Logical Clock

C(x)<C(y)xy C(x) < C(y) \nRightarrow x \rightarrow y

Above is only true on single processor, or when x is a send event and y is the corresponding recv event

Lamport’s clocks only give partial order

Lamport’s Total Order

Condition for \Rightarrow

No single total order

Distributed Mutual Exclusion Lock Algorithm

To request a lock:

Tie goes to lower node number

I only have the lock when:

To release a lock:

Correctness?

Deferring ACKs if my req precedes yours

Lamport’s Physical Clock

ab    Ci(a)<Cj(b)a \mapsto b \implies C_i(a) < C_j(b)

Physical clock conditions:

IPC Time and Clock Drift

let μ \mu be lower bound on IPC

To avoid anomalies if a on Pib on Pj a \text{ on } P_i \mapsto b \text{ on } P_j

  1. Ci(t+μ)Cj(t)>0 C_i(t + \mu) - C_j(t) > 0
  2. Ci(t+μ)Ci(t)>μ(1k) C_i(t + \mu) - C_i(t) > \mu(1-k)

Using 1 and 2 and bound by ϵ \epsilon on mutual drift, μ>=ϵ1k \mu >= \frac{\epsilon}{1-k} to avoid anomalies